Welcome![Sign In][Sign Up]
Location:
Search - CPLD UART

Search list

[CommunicationFPGA-UART

Description: 用FPGA器件实现UART核心功能的一种方法 串行外设都会用到RS232-C异步串行接口,传统上采用专用的集成电路即UART实现,如TI、EXAR、EPIC的550、452等系列,但是我们一般不需要使用完整的UART的功能,而且对于多串口的设备或需要加密通讯的场合使用UART也不是最合适的。如果设计上用到了FPGA/CPLD器件,那么就可以将所需要的UART功能集成到FPGA内部,本人最近在用XILINX的XCS30做一个设计的时候,就使用VHDL将UADT的核心功能集成了,从而使整个设计更加紧凑,更小巧、稳定、可靠
Platform: | Size: 27456 | Author: 开心 | Hits:

[Com Portuart

Description: 采用CPLD实现串口通信(Verilog硬件描述语言)
Platform: | Size: 5106 | Author: wuzhidong | Hits:

[Windows KernelCPLD的串口程序(VHDL)

Description:

在CPLD上实现UART,利用VHDL进行编程。


Platform: | Size: 746970 | Author: greatlht | Hits:

[VHDL-FPGA-Verilogsopc

Description: altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
Platform: | Size: 8863744 | Author: 刘吉 | Hits:

[VHDL-FPGA-VerilogAltera_uart_VHDL

Description: FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
Platform: | Size: 10240 | Author: cyberworm | Hits:

[VHDL-FPGA-VerilogAltera_uart_Verilog

Description: FPGA/CPLD应用,uart的Verilog HDL原码-FPGA/CPLD applications, UART Verilog HDL source
Platform: | Size: 10240 | Author: cyberworm | Hits:

[Software Engineeringverilog50%

Description: 本文主要介绍了50%占空比三分频器的三种设计方法,并给出了图形设计、VHDL设计、编译结果和仿真结果。设计中采用EPM7064AETC44-7 CPLD,在QUARTUSⅡ4.2软件平台上进行。 -This paper introduces a 50% duty cycle three dividers of the three design methods, and gives the graphic design, VHDL design, compile results and the simulation results. Design used EPM7064AETC44-7 CPLD. In QUARTUS II 4.2 software platform.
Platform: | Size: 187392 | Author: li | Hits:

[Embeded-SCM Developfpga_digit_serial_arithmetic_1

Description: fpga/CPLD开发管理Digit-Serial DSP Functions-fpga/CPLD Development and Management of Digit-Serial DSP Functions
Platform: | Size: 2659328 | Author: liuandy | Hits:

[Embeded-SCM DevelopquartusII

Description: quartusII 中文使用手册,给广大cpld 及 fpga 开发用户使用,谢谢大家的支持。-Chinese quartusII user manual to the general development of CPLD and FPGA users, I would like to thank everyone
Platform: | Size: 2369536 | Author: hrbu | Hits:

[VHDL-FPGA-Verilog8080

Description: EPM1270和单片机的8080通讯接口,适合单片机与CPLD之间的高速通讯,verilog语言,QuartusII环境-EPM1270 and 8080 MCU communication interface for MCU and CPLD high-speed communication between, verilog language, QuartusII environment
Platform: | Size: 483328 | Author: 汉武帝 | Hits:

[Embeded-SCM Developcpld_quartus50_over

Description: 通过VERILOG HDL语言使用CPLD连接PS2键盘.-VERILOG HDL languages through the use of CPLD to connect PS2 keyboard.
Platform: | Size: 2039808 | Author: 王首浩 | Hits:

[Com Portuart

Description: 采用CPLD实现串口通信(Verilog硬件描述语言)-Realize the use of CPLD serial communication (Verilog Hardware Description Language)
Platform: | Size: 5120 | Author: wuzhidong | Hits:

[Software Engineeringfpgadesign

Description: FPGA/CPLD数字电路设计经验分享,有助于设计能力提高-FPGA/CPLD digital circuit design experience to share, contribute to the design capacity to improve
Platform: | Size: 837632 | Author: 小武 | Hits:

[VHDL-FPGA-VerilogUART

Description: 串口实验,很好用,我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
Platform: | Size: 338944 | Author: 韩思贤 | Hits:

[VHDL-FPGA-VerilogUART

Description: 串口通讯 verilog CPLD EPM1270 源代码-Serial Communication verilog CPLDEPM1270 source code
Platform: | Size: 56320 | Author: 韩思贤 | Hits:

[VHDL-FPGA-Veriloguart

Description: VHDL语言编写的全功能串口模块(包含DTR,RTS等管脚),在CPLD器件上测试通过-VHDL language, full-featured serial modules (including DTR, RTS pin, etc.), in the CPLD device test
Platform: | Size: 223232 | Author: 李特威 | Hits:

[Embeded-SCM DevelopUART.ZIP

Description: 一个完整的用cpld实现串口功能的代码。经过验证,不经过任何修改便可使用。-serial port realized by vhdl.It has been tested and can be used with any change.
Platform: | Size: 56320 | Author: wangyilong | Hits:

[Embeded-SCM DevelopCPLD_UART

Description: 基于FPGA CPLD设计与实现UART,一听名字就知道,不用再说了吧,-FPGA CPLD-based Design and Implementation of UART, a name, we know that you do not say any more,
Platform: | Size: 1024 | Author: 何力 | Hits:

[VHDL-FPGA-VerilogUART-CPLD

Description: 使用VHDL在CPLD上设计UART的一个项目-VHDL design UART
Platform: | Size: 6302720 | Author: yuyue | Hits:

[VHDL-FPGA-Veriloguart-code-(Verilog)

Description: uart 源码 Verilog CPLD -uart code Verilog CPLD
Platform: | Size: 10240 | Author: zhaochao | Hits:
« 12 3 »

CodeBus www.codebus.net